Excess current detectors employing multi-aperture ferrite elements



Sept. 8, 1970 J. AGNIERE 3,528,105

EXCESS CURB DETECTORS EMPLOY G MULTI-APERTURE FERRITE ELEME Filed Feb. 16, 1968 2 Sheets-Sheet :3

INVENTOR am're Tenn Ga United States Patent O Int. Cl. (501: 19/16 US. Cl. 324-103 8 Claims ABSTRACT OF THE DISCLOSURE An excess current detector comprising at least one multi-aperture ferrite element, of the type sold under the trademark Transfiuxor, to one operating winding of which is supplied a signal corresponding to the current to be monitored. The arrangement is such that the element supplies an output when the signal exceeds a threshold value predetermined by the magnetic characteristics of the element.

BACKGROUND OF THE INVENTION The present invention concerns an excess current detector and has as its object the production of a detector of this type based on the property of ferrites having a rectangular hysteresis loop in which the coercive force defines an operating threshold corresponding to a certain number of ampere turns; this varying according to the magnetic circuit influenced by the force. In other words the invention concerns the use of multi-aperture ferrite elements, hereinafter referred to as, and sold under the trademark, Transfluxors, to form an excess current detector, particularly with a view to using to advantage the precise operating threshold of Transfluxors.

An object of the invention is the production with a high degree of precision of an excess current detector of the so-called inverse time type, that is, in which the response time is inversely proportional to the amount by which the current being monitored exceeds a predetermined threshold value. Another object of the invention is the production of an excess current detector device of homogeneous structure essentially comprising magnetic elements of the type considered above.

As guidance to the state of the art, reference may be had for example to German patent specification No. 1,169,017 concerning a control device for voltages or currents of an alternating network using Transfiuxors as means for detecting these magnitudes. These Transfluxors which are premagnetised by a continuous current comprise control windings through which pass currents proportional to the magnitudes to be monitored and blocking or permitting the transmission of detection signals depending on the value of the observed magnitude. However this concerns devices operating on the on/oli principle in which the problem of response time is not con-- sidered.

US. Pat. No. 3,018,416 describes an excess current detector of the inverse time type, but this uses analog counters comprising both magnetic elements and semiconductor elements.

Compared with this prior art, the present invention offers the advantages of providing very simple detectors within the framework of a device which is entirely magnetic.

SUMMARY OF THE INVENTION According to the present invention there is provided in an excess current detector comprising at least one detector element such as that sold under the trademark ice Transfiuxor having a priming winding through which a signal corresponding to said current is arranged to pass, the improvement of associating said element with a reset pulse generator and connecting said element to a pulse counter arranged to count the number of pulses supplied by said element when said current exceeds a predetermined threshold value.

Experience has shown that it is possible to make in this way, particularly in the control of the magnitude of an alternating current, a homopolar relay of the inverse time type. In addition the whole of the device can be formed by employing a completely magnetic technique and a very high degree of flexibility can be obtained particularly concerning the selection of the re-set and return times of the device. In particular it is possible virtually to make the device a constant time device with a very short return time.

BRIEF DESCRIPTION OF THE DRAWING The features and advantages of the invention will be seen from the description given hereinafter by way of example with reference to the accompanying drawings in which:

FIG. 1 is a diagram showing the principle of an excess voltage detector according to the invention;

FIG. 2 shows a more highly developed but simplified diagram of an embodiment of the invention;

FIG. 3 shows a diagram representing an experimental response curve of the device illustrated in FIG. 2.

DESCRIPTION OF THE PREFERRED EMBODIMENT In the diagram shown in FIG. 1 there are three Transfiuxor elements of the type comprising four lugs a, b, c, (2, around a major central aperture, these elements being used in this case according to the so-called resistance technique.

It is known that the wiring of a Transfiuxor having this structure comprises:

an input winding such as E for the writing pulses;

a re-set winding such as R1 for the re-set pulses which at the same time gives a destructive read-out;

an output winding such as S;

a compensating winding (not shown), also wound on the output lug c and which is intended to compensate the reaction of the following Transfiuxor;

a priming winding or line such as A also passing through the output lug c.

This priming Winding, also called a position winding, usually has passing through it a direct current intended to provide the inversion of the flux around the output lug when there has been a writing pulse. This current is indispensable in order to obtain an output. This priming current must be of a minimum value corresponding to the coercive field around the output lug for there to be pulses at the output. In the particular case of a Transfiuxor in use, this value is of the order of 0.15 ampere-turns and constitutes an operating threshold.

In the detector according to the invention, the priming winding which passes in opposite directions through the output lugs c of the elements 1 and 2, is the path for an alternating current signal, for example of 50 cycles per second derived from the output terminals of a transformer 5 associated with an energy distribution line 6 upon which it is proposed to detect the excess currents.

The re-set windings R1 of the elements 1 and 2 are fed by one of the phases of a two-phase re-set pulse generator RSG; that is a generator arranged to supply two output trains of pulses which are displaced in time. The re-set winding R2 of the element 3 is fed by the second phase of this pulse generator. The two input windly has passing through it a direct current of suitable value.

The re-set pulse generator (or clock pulse generator) is arranged to operate at a fixed frequency appreciably higher than the frequency of the alternating current to be controlled. If this latter frequency is for example 50 cycles per second the frequency F of re-set is for example 425 cycles per second; the selected value not being a whole multiple of the frequency of the alternating current to be controlled.

Under these conditions pulses will appear at the output of one or other of the elements 1 and 2 each time that the peak value of the alternating current circulating in the priming winding A exceeds the threshold value for a time greater than about one hundred microseconds. This limitation permits the elimination from the output of the influence of short isolated peaks of a few microseconds duration which could accidentally be superimposed on the current of the 50 cycles per second. Using two elements 1 and 2 with priming windings wound in opposite directions permits the observation of the two half-waves of the monitored current and in case of asymmetry (a periodic component) avoids having a system in which the response depends on the sign of this component.

On average, if i is the threshold value, during each period T there will be obtained output pulses during a time t such that:

i being the peak value of the sinusoidal current.

In the vicinity of the threshold, the output pulse does not attain its maximum value, but it is sufficient to provide another Transfluxor in series following the element 3 (this will be the element 4 illustrated in FIG. 2) to eliminate doubtful cases.

The device thus formed gives a response of a frequency increasing with the voltage of the alternating current; and therefore permits the provision of an inverse time type relay.

The element 3 sums the pulses collected at the outputs of the elements 1 and 2. The pulses collected in this way and transmitted to the counter 8 are counted in the latter, while the output of this counter may be supplied to succeeding logic stages or may be used directly to fire a thyratron if power is required.

FIG. 2 shows the simplified diagram of a complete embodiment in which an entirely magnetic technique is used, in which the counter 8 in particular is formed by a series of four bistables B to B each of these bistables being formed by a bistable device have one output, and of the type described in French patent specification No. 1,452,767.

Thus in each of these bistables are two Transfluxor pairs 11, 13 and 12, 14 respectively associated with the two phases of the re-set pulse generator (not shown) with an input 15 on the element 11 and an output 16 on the element 14. A loop 17 forms a crossed coupling, while loops 18 and 19 establish a coupling between the input of the element 13 and the output of the elements 12 and 14. As is explained in the above mentioned French patent specification No. 1,425,767, under these conditions the output 16 gives a pulse for two at the input 15: there is thus a ferrite binary divider with the possibility of return to zero by a circuit such as 20.

This diagram shows the detector having two elements 4 1, 2 already described with reference to FIG. 1, with the element 3 which, as already shown, permits the summation of the pulses collected at the output of the first two elements. The pulses collected in this way in the element 3 are transmitted through the intermediary of the element 4 which permits elimination of the doubtful cases.

The output of the element 4 not only feeds the input circuit 15 of the first bistable B of the counter but also feeds the input circuit 21 of a phase difference register, the whole of which is designated by the reference 22. This register comprises in per se known manner, connected in a chain, a line I I I I of so-called odd elements, and a line P P P of so-called even elements, these two lines being respectively connected to the two phases of the re-set pulse generator. According to a per se known technique, the information is transmitted from any even element to a following odd element and reciprocally from an odd element to a following even element, the even elements having a memory function necessary to prevent any interaction between two successive pieces of information. Any cycle comprises the following operations: writing; priming; odd advance (reading); priming; even advance.

It will be sufficient to note that the readings are eifected at the outputs S S S S S of the odd elements while observing that it has thus been possible to eliminate the even element P (indicated in dash-dotted lines) which could have been located at the end of the register 22.

The outputs S to S of the register 22 are connected to a logic circuit (OR) 30 comprising under the circumstances a first stage of four Transfiuxors 31 to 34, each of which receives the output of three stages of the register 22 and a second stage having two elements 35 and 36 respectively receiving the pulses transmitted by these elements 31, 32 on the one hand and the elements 33, 34 on the other hand. A common output 37 of the two elements 35, 36 is supplied to the input of an element 41 forming together with a second element 42 a second logic circuit (NOT) 40. The input 43 of the element 42 is permanently fed by an impulse 1 which is thus inscribed there at each cycle. An output circuit 44 makes use in opposition of the output lugs of the two elements 41 and 42 of the logic circuit 40 and on the other hand makes use of the input lugs of the two elements 51, 52, the return to zero circuits such as 20, of the bistables being connected two by two respectively to the output lugs of these two elements.

The device thus formed operates in the following manner. The pulses supplied by the intermediate element 4 and applied to the input 15 of the counter are the object in this counter of a digital integration, that is of a counting operation, but this counting operation is effected without discrimination with regard to the interval which may occur between sucessive pulses. The integration time of the counter alone is in other words, infinite. If, in consequence, the disconnection of any member is subordinated to the appearance of a pulse at the output of the counter 8, this disconnection could occur for example after the reception of one impulse per day for a month. This disadvantage is eliminated by an automatic return to Zero of the counter each time there has not been any impulse at the output of the detector for a certain time predetermined by the register 22, while this time may be considered as forming a return time of the detector.

Each impulse directed to the input 15 of the counter is also applied to the input 21 of the register 22 and appears successively in the course of the following cycles at the Outputs S to S of the latter. During the whole time in which such a pulse remains present at any one of the outputs of the register, it is present at the output 37 of the OR circuit 30 and appears at the output 44 of the logic circuit 40 in opposition to the 1 permanently applied to the input 43 of the logic circuit. No return to Zero pulse is applied under these conditions to the counter.

In contrast, as soon as any pulse disappears at the outputs S to S of the register, the pulse 1 which is present at the input 43 appears at the output 44 and is simultaneously transmitted by the elements 51 and 52 to the circuits 20 for return to zero of the bistables B to B of the counter 8 which is thus returned to zero.

When there have been a few pulses, for example when there is a transient defect, the return to zero thus occurs at the end of a predetermined time after disappearance of the pulses.

This device offers the advantage of permanently providing at the output 37 of the OR circuit the information defect present which is in some manner the complement of the information return to zero which is at the output 44.

In the first approximation the capacity of the counter determines the number of pulses necessary to provide disconnection, this number being equal in the embodiment considered comprising four bistables, to 2 that is 16. The average disconnection time naturally corresponds to this number divided by the mean frequency of the pulses occurring at the input 15 of the counter, this time being defined in the vicinity of the threshold to within a half period in the case under consideration of detection on the two half-waves of the current, or to within one period in the case of detection on a single half-wave. The absolute error naturally decreases and tends toward the period of the clock pulses when the current detected tends towards infinity.

The return time, that is the time at the end of which the counter is returned to zero, is constant and is determined by the number of stages of the register: it is equal to n/F, n being the number of stages of the register and F being the clock pulse frequency.

In the second approximation, account must also be taken of the fact that a ferrite logic introduces a delay which is l/F er elementary function. In the case under consideration, the result on the one hand is that the return to zero which is effected permanently in the absence of any defect, does not cease immediately when a defect occurs. The return to zero line has a certain lag over the counter line, resulting in the loss of a certain number (n) of pulses which are not counted. On the other hand the detector and input device introduces a lag of a certain number (11") of pulses. To sum up, disconnection is effected when there have been at the output of the detector 2 +n'+n" impulses, on condition that the time interval between any two successive impulses is less than or equal to n/F.

FIG. 3 shows a plot of the response curve of the experimental device which has just been described with reference to FIG. 2, having as abscissae the mean frequency of the pulses collected at the output 15 (21) of the detector, and as the ordinates, the effective value expressed in milliamperes of the priming current I The clock pulse frequency having been selected equal to 425 cycles per second, it is noted that the mean frequency of the collected pulses practically attains this value for a defect current of 900 milliamperes, that is approximately six times greater than the nominal value i which corresponds to the threshold.

The theoretical disconnection time is then equal to E5 37.6 milliseconds the number n of pulses which are not counted is equal to 2 and n" is also equal to 2, giving for the minimum effective value of the response time 37.6+ (2+2)2.35=47 milliseconds threshold value (211,), a value in which the relative error is close to the maximum, it is found that f=340 cycles per second giving a response time of 56.4 milliseconds and a relative error of the order of 10%.

It is easy to see that to obtain a better degree of precision, it is suflicient to increase the clock pulse frequency and consequently the number of bistables and the length of the register.

The device described therefore permits the production of a disconnection which becomes more rapid as the defect current increases, employing an entirely magnetic technique only using Transfluxor elements. However, it is obvious that without going outside the scope of the invention, it would be possible to use counters of any other type and also means for the return to zero of these counters based on different principles. Another possible variation to be indicated comprises eliminating the input winding on the detector element or elements: operation remains the same but with a higher threshold value for the priming current. According to another variation, it is possible to eliminate the register 22 and the OR circuit 30 and directly to control the NOT 40 by the connection 21: the counter is then returned to zero when a single pulse is lacking. The device therefore becomes a practically constant time device with a threshold of the order of six times the previous threshold.

It will be understood that the above description of the present invention is susceptible to various modifications, changes and adaptations and the same are intended to be comprehended within the meaning and range of equivalents of the appended claims.

We claim:

1. In an excess current detector comprising at least one detector element of the multi-aperture ferrite storage core type having a priming winding through which a signal corresponding to said current is arranged to pass, a re-set winding, and a pulse energized input winding, the improvement wherein said detector further comprises a re-set pulse generator connected to said reset winding for delivering a train of re-set pulses thereto, and a pulse counter operatively connected to said element for counting the number of pulses supplied by said element when said current exceeds a predetermined threshold value.

2. A detector according to claim 1 for the detection of an alternating current, wherein the frequency of the signal supplied by said pulse generator differs from a whole multiple of the frequency of said alternating current.

3. A detector according to clain r 1, wherein there are three of said elements each also having an output winding and two of said elements having their priming Windings connected together in such a manner that said signal passes in respectively opposite directions through said priming windings of said two elements, and the output windings of said two of said elements being both connected to said input winding of the third of said elements.

4. A detector according to claim 3, wherein said re-set pulse generator is a two-phase clock pulse generator, said re-set windings of said two elements are connected to one phase of said generator and said re-set winding of said third element is connected to the other phase of said generator, such that said third element sums the pulses supplied by said two elements.

5. A detector according to claim 3 wherein there is a fourth of said elements and said output winding of said; third element is supplied to said counter through the intermediary of said fourth element connected in series with said third element.

6. A detector according to claim 1, further comprising means for re-setting said counter to zero, said means having an input fed in parallel with that of said counter and arranged to be rendered inoperative for a predetermined time by any pulse applied to said input.

7. A detector according to claim 6, wherein said means for re-setting said counter comprises a phase difference References Cited register having two series of Transfiuxors, each series UNITED STATES PATENTS being connected in a chain and having an output, and a logic circuit of the OR type having an input connected 3,108,194 10/1963 F F 324-111 XR to each of said outputs and an output followed by a 5 3,183,498 5/1965 'Mldls at logic circuit of the NOT type for directing a return to 325615 18 6/1966 Crane 340 253 zero pulse toward said counter in the absence of any pulse on either of said outputs of said chains. ALFRED SMITH Pnmary Exammer 8. A detector according to claim 1, wherein said counter comprises a series of one-input bistables each i 10 340-253 COIIlpl'lSlng four Transfiuxors.

US. Cl. X.R. 

